JPH0346979B2 - - Google Patents

Info

Publication number
JPH0346979B2
JPH0346979B2 JP62061250A JP6125087A JPH0346979B2 JP H0346979 B2 JPH0346979 B2 JP H0346979B2 JP 62061250 A JP62061250 A JP 62061250A JP 6125087 A JP6125087 A JP 6125087A JP H0346979 B2 JPH0346979 B2 JP H0346979B2
Authority
JP
Japan
Prior art keywords
type
single crystal
region
layer
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62061250A
Other languages
English (en)
Japanese (ja)
Other versions
JPS63228662A (ja
Inventor
Hiroyuki Nomichi
Satoru Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Priority to JP62061250A priority Critical patent/JPS63228662A/ja
Publication of JPS63228662A publication Critical patent/JPS63228662A/ja
Publication of JPH0346979B2 publication Critical patent/JPH0346979B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP62061250A 1987-03-18 1987-03-18 相補型ｍｏｓ半導体装置の製造方法 Granted JPS63228662A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62061250A JPS63228662A (ja) 1987-03-18 1987-03-18 相補型ｍｏｓ半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62061250A JPS63228662A (ja) 1987-03-18 1987-03-18 相補型ｍｏｓ半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS63228662A JPS63228662A (ja) 1988-09-22
JPH0346979B2 true JPH0346979B2 (en]) 1991-07-17

Family

ID=13165799

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62061250A Granted JPS63228662A (ja) 1987-03-18 1987-03-18 相補型ｍｏｓ半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS63228662A (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3017860B2 (ja) * 1991-10-01 2000-03-13 株式会社東芝 半導体基体およびその製造方法とその半導体基体を用いた半導体装置
JP4723797B2 (ja) * 2003-06-13 2011-07-13 財団法人国際科学振興財団 Ｃｍｏｓトランジスタ

Also Published As

Publication number Publication date
JPS63228662A (ja) 1988-09-22

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees